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AXIOM is looking for talented, motivated candidates to join its fast growing team involved in the development of the next generation of functional verification solutions. We are looking for people with energy and excitement to fill various positions in engineering, both in USA and in India.

USA

Verification Technology Development Engineer, Milpitas, CA
Job Profile:

  • Contribute significantly to the development of next generation functional verification products.
  • The tool will be developed in C++.

Requirements:

  • Bachelors or Masters Degree in Computer Science OR Computer Engineering
  • 2-8 years of prior experience developing simulation, formal verification and assertion based verification software using C++
  • In-Depth knowledge of the Verilog language and functional verification technologies is a must

Field Application Engineer, Milpitas, CA
Job Profile:

  • Provide pre- and post-sales support for company products including simulation, test bench, assertion based verification and debugging
  • Test new features and products and provide technical support to R&D for resolving product bugs and design issues
  • Deliver corporate and technical presentations and present product demonstrations to existing and new customers
  • Coordinate with the marketing team to write specifications for product enhancement and create product collateral including brochures and manuals
  • The incumbent will be required to use Verilog, SystemVerilog, OpenVera, scripting and C languages

Requirements:

  • Master’s degree in Electrical Engineering
  • In-depth knowledge of Verilog based simulation and front-end chip design methodologies
  • Experience with testbench language such as SystemVerlog, Vera, or e

India

Verification Technology Development Engineer, Bangalore, India
Job Profile:

  • Contribute significantly to the development of next generation functional verification products.
  • The tool will be developed in C++.

Requirements:

  • Bachelors or Masters Degree in Computer Science OR Computer Engineering
  • 2-8 years of prior experience developing simulation, formal verification and assertion based verification software using C++
  • In-Depth knowledge of the Verilog language and functional verification technologies is a must

RTL and design engineer
Requirements

  • 5+ years in ASIC design and verification.
  • Strong in verilog and general digital logic.
  • Proven experience in taping out at least two complex chips from spec to tape-out.
  • Emulation / FPGA validation are a plus.
  • Preferably should have worked on standard interface implementation such as MAC, PCI etc.
  • Working knowledge of I/O interfaces is a big plus.
  • Masters or Bachelors degree in Electronics / Electrical / Computer Engineering.

Senior Verification engineers (code – SVS6S)
Requirements

  • 6+ years in ASIC verification.
  • Bench design/coding and BFM and design/coding experience required.
  • Strong Verilog skills. SystemC, Vera, PLI, C, Perl, Makefiles expertise desired.
  • Hands on verification experience on Qos, memory management, North bridge, South bridge, DMA desirable.
  • Emulation / FPGA validation are a plus.
  • At least one chip tape-out experience.

Verification engineers Grade – II (code – VS2S)
Requirements

  • 2 - 6 years in ASIC verification.
  • Hands on experience on Verilog / Vera / SystemVerilog / SystemC
  • BFM design and coding experience a must.
  • Desirable - c/c++, perl, make file, scripting know how and expertise.
  • Emulation/FPGA validation a plus.
  • At least one chip tape out/Production quality IP experience desirable.
  • Protocols - Ethernet MAC, PCI/PCI-X/PCIe, SPI4.2, XAUI, XFI, IP, Interlaken, AHB, OCP, USB, DDR2, DDR3, Storage, Security, USB
  • Hands on verification experience on Qos, memory management, North bridge, South bridge, DMA desirable.
  • Good digital design knowledge preferred.
  • Masters or Bachelors degree in Electronics / Electrical / Computer Science/Electronics & Communication/ Instrumentation/ IT Engineering

Verification engineer Grade I (VSJ)
Requirements

  • 0-2 years in ASIC verification.
  • Exhaustive experience in writing test cases and debugging.
  • Strong in digital design, verilog and exposure to PLI usage.
  • Familiarity with MAC, PCI,  USB etc.
  • C / C++ skills.
  • Masters or Bachelors degree in Electronics / Electrical / Computer Engineering.

Software engineer (code - SW2E)
Requirements

  • 2+ years in C programming, software build methodology & scripting (Unix platform).
  • TCL/TK, JAVA based GUI development is a plus.
  • QT Skill is an added advantage.
  • Flair for VLSI and Logic Design.
  • Background in digital electronics required.
  • Masters/Bachelors degree in Electronics/Computer Science Engineering.

M.Tech Students may also apply for internship and further employment with us.

If you are interested in joining this winning team, please mail your resume to resumes@AXIOM-da.com
 
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